Top level testbench for current mirror

Transient analysis (tran)

Check transient operation

Name Parameter Description   Min Typ Max Unit
Output current ibns_20u   Spec 16.000 20.000 24.000 uA
      Sch_typ   21.760    
      Sch_etc 21.189 21.854 22.356  
      Sch_3std 16.310 21.900 27.490  
      Lay_typ   21.760    
      Lay_etc 21.188 21.852 22.356  
      Lay_3std 16.559 21.637 26.714  
Output current ibns_20u_9n   Spec 16.000 20.000 24.000 uA
      Sch_typ   21.760    
      Sch_etc 21.189 21.854 22.356  
      Sch_3std 16.310 21.900 27.490  
      Lay_typ   21.759    
      Lay_etc 21.187 21.851 22.356  
      Lay_3std 16.559 21.636 26.714  
Gate-Source voltage vgs_m1   Spec 0.300 0.600 0.800 V
      Sch_typ   0.620    
      Sch_etc 0.511 0.614 0.711  
      Sch_3std 0.608 0.620 0.631  
      Lay_typ   0.620    
      Lay_etc 0.511 0.614 0.711  
      Lay_3std 0.611 0.620 0.629  
Current settling error ibn_settl_err   Spec -2.000 0.000 2.000 nA
      Sch_typ   0.020    
      Sch_etc 0.000 0.040 0.500  
      Sch_3std 0.009 0.023 0.036  
      Lay_typ   0.200    
      Lay_etc 0.020 0.310 2.410  
      Lay_3std 0.117 0.201 0.284